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features ? fast read access time - 150 ns ? fast byte write - 200 s or 1 ms ? self-timed byte write cycle Cinternal address and data latches Cinternal control timer Cautomatic clear before write ? direct microprocessor control Cdata polling ? low power C30 ma active current C100 a cmos standby current ? high reliability Cendurance: 10 4 or 10 5 cycles Cdata retention: 10 years ? 5v 10% supply ? cmos & ttl compatible inputs and outputs ? jedec approved byte wide pinout ? commercial , industrial and military temperature rang es description the f t28c16 is a low-power, high-performance electrically erasable and program- mable read only memory with easy to use features. the f t28c16 is a 16k memory organi s ed as 2,048 words by 8 bits. the device is manufactured with reliable atmel die. pin configurations pin name function a0 - a10 addresses ce chip enable oe output enable we write enable i/o0 - i/o7 data inputs/outputs nc no connect dc dont connect c dil , /fp to p v i e w 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 a7 a6 a5 a4 a3 a2 a1 a0 i/o0 i/o1 i/o2 gnd vcc a8 a9 we oe a10 ce i/o7 i/o6 i/o5 i/o4 i/o3 (continued) ft28c16 parallel eeprom 16k (2kx8) to p v i e w note: plcc package pins 1 and 17 are dont connect. 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 a6 a5 a4 a3 a2 a1 a0 nc i/o0 a8 a9 nc nc oe a10 ce i/o7 i/o6 4 3 2 1 32 31 30 14 15 16 17 18 19 20 i/o1 i/o2 gnd dc i/o3 i/o4 i/o5 a7 nc nc dc vcc we nc lcc/"j"lcc rev 2 1/12 2011 a ll data sheet.com
the f t28c16 is accessed like a static ram for the read or write cycles without the need of external components. dur- ing a byte write, the address and data are latched inter- nally, freeing the microprocessor address and data bus for other operations. following the initiation of a write cycle, the device will go to a busy state and automatically clear and write the latched data using an internal control timer. the end of a write cycle can be determined by data polling of i/o 7. once the end of a write cycle has been detected, a new access for a read or a write can begin. the cmos technology offers fast access times of 150 ns at low power dissipation. when the chip is deselected the standby current is less than 100 a. force' s 28c16 has additional features to ensure high qual- ity and manufacturability. the device utili s es error correc- tion internally for extended endurance and for improved data retention characteristics. an extra 32 bytes of eeprom are available for device identification or tracking. block diagram absolute maximum ratings* temperature under bias................................ -55c to +125c *notice: stresses beyond those listed under absolute maximum ratings may cause permanent dam- age to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability storage temperature ..................................... -65c to +150c all input voltages (including nc pins) with respect to ground ...................................-0.6v to +6.25v all output voltages with respect to ground .............................-0.6v to v cc + 0.6v voltage on oe and a9 with respect to ground ...................................-0.6v to +13.5v ft28c16 parallel eeprom 16k (2kx8) rev 2 2/12 2011 a ll data sheet.com
device operation read: the f t28c16 is accessed like a static ram. when ce and oe are low and we is high, the data stored at the memory location determined by the address pins is asserted on the outputs. the outputs are put in a high impedance state whenever ce or oe is high. this dual line control gives designers increased flexibility in preventing bus contention. byte write: writing data into the f t28c16 is similar to writing into a static ram. a low pulse on the we or ce input with oe high and ce or we low (respectively) ini- tiates a byte write. the address location is latched on the last falling edge of we (or ce ); the new data is latched on the first rising edge. internally, the device performs a self- clear before write. once a byte write has been started, it will automatically time itself to completion. once a pro- gramming operation has been initiated and for the duration of t wc , a read operation will effectively be a polling opera- tion. fast byte write: the f t28c16e offers a byte write time of 200 s maximum. this feature allows the entire device to be rewritten in 0.4 seconds. data polling: the f t28c16 provides data polling to signal the completion of a write cycle. during a write cycle, an attempted read of the data being written results in the complement of that data for i/o 7 (the other outputs are indeterminate). when the write cycle is finished, true data appears on all outputs. write protection: inadvertent writes to the device are protected against in the following ways: (a) v cc senseif v cc is below 3.8v (typical) the write function is inhibited; (b) v cc power on delayonce v cc has reached 3.8v the device will automatically time out 5 ms ( typical) before allowing a byte write; and (c) write inhibitholding any one of oe low, ce high or we high inhibits byte write cycles. chip clear : the contents of the entire memory of the ft 28c16 may be set to the high state by the chip clear operation. by setting ce low and oe to 12 volts, the chip is cleared when a 10 msec low pulse is applied to we . device identification: an extra 32 bytes of eeprom memory are available to the user for device iden- tification. by raising a9 to 12 0.5v and using address locations 7e0h to 7ffh the additional bytes may be written to or read from in the same manner as the regular memory array. ft28c16 parallel eeprom 16k (2kx8) rev 2 3/12 2011 a ll data sheet.com
4 dc and ac operating range f t28c16 operating temperature (case) com. 0c - 70c ind. -40c - 85c operating modes mode ce oe we i/o read v il v il v ih d out write (2) v il v ih v il d in standby/write inhibit v ih x (1) xh igh z write inhibit x x v ih write inhibit x v il x output disable x v ih xh igh z chip erase v il v h (3) v il h igh z dc characteristics symbol parameter condition min max units i li input load current v in = 0v to v cc + 1v 10 a i lo output leakage current v i/o = 0v to v cc 10 a i sb1 v cc standby current cmos ce = v cc - 0.3v to v cc + 1.0v 100 a i sb2 v cc standby current ttl ce = 2.0v to v cc + 1.0v com. 2 ma ind. 3 ma i cc v cc active current ac f = 5 mhz; i out = 0 ma ce = v il com. 30 ma ind. 45 ma v il input low voltage 0.8 v v ih input high voltage 2.0 v v ol output low voltage i ol = 2.1 ma .4 v v oh output high voltage i oh = -400 a2 . 4v ft28c16 parallel eeprom 16k (2kx8) mil 5v 10% vcc power supply -55c - 125c rev 2 4/12 2011 a ll data sheet.com
ac read waveforms (1)(2)(3)(4) notes: 1. ce may be delayed up to t acc - t ce after the address transition without impact on t acc . 2. oe may be delayed up to t ce - t oe after the falling edge of ce without impact on t ce or by t acc - t oe after an address change without impact on t acc . 3. t df is specified from oe or ce whichever occurs first (c l = 5 pf). 4. this parameter is characteri s ed and is not 100% tested. input test waveforms and measurement level output test load note: 1. this parameter is characteri s ed and is not 100% tested. ac read characteristics t r , t f < 20 ns pin capacitance f = 1 mhz, t = 25c (1) symbol typ max units conditions c in 4 6p fv in = 0v c out 81 2p fv out = 0v ft28c16 parallel eeprom 16k (2kx8) min max min max t acc 150 200 t ce (1) 150 200 t oe (2) 10 70 10 80 t df (3,4) 050055 t oh 00 symbol parameter output hold from oe, ce or address, whichever occurred first. ft28c16-15 ft28c16-20 address to output delay ce to output delay oe to output delay ce or oe high to output float min max 250 ns 250 ns 10 100 ns 060ns 0n s ft28c16-25 units rev 2 5/12 2011 a ll data sheet.com
ac write waveforms we controlled ce controlled ac write characteristics symbol parameter min typ max units t as , t oes address, oe set-up time 10 ns t ah address hold time 50 ns t wp write pulse width (we or ce ) 100 1000 ns t ds data set-up time 50 ns t dh , t oeh data, oe hold time 10 ns t cs , t ch ce to we and we to ce set-up and hold time 0 ns t wc write cycle time f t28c16 0.5 1.0 ms f t28c16e 100 200 s ft28c16 parallel eeprom 16k (2kx8) rev 2 6/12 2011 a ll data sheet.com
notes: 1. these parameters are characteri s ed and not 100% tested. 2. see ac characteristics. data polling waveforms chip erase waveforms t s = t h = 1 sec (min.) t w = 10 msec (min.) v h = 12.0v 0.5v data polling characteristics (1) symbol parameter min typ max units t dh data hold time 10 ns t oeh oe hold time 10 ns t oe oe to output delay (2) ns t wr write recovery time 0 ns ft28c16 parallel eeprom 16k (2kx8) rev 2 7/12 2011 a ll data sheet.com
ft28c16 parallel eeprom 16k (2kx8) rev 2 8/12 2011 a ll data sheet.com
32j 32 lead, plastic j-leaded chip carrier (plcc) 24p6 24 lead, 0.600" wide, plastic dual inline package (pdip) 24s 24 lead, 0.300" wide, plastic gull wing small outline (soic) options blank standard device: endurance = 10k write cycles; write time = 1 ms e high endurance option: endurance = 100k write cycles; ft28c16 parallel eeprom 16k (2kx8) package type ordering information (1) active standby 24d6 32j commercial 24p6 (0c to +70c) 24s 24d6 32j industrial 24p6 (-40c to +85c) 24s military (-55c to +125c) military (-55c to +125c) mil-std-883 m5004 24d6 32j commercial 24p6 (0c to +70c) 24s 24d6 32j industrial 24p6 (-40c to +85c) 24s military (-55c to +125c) military (-55c to +125c) mil-std-883 m5004 24d6 32j commercial 24p6 (0c to 70c) 24s 24d6 32j industrial 24p6 (-40c to +85c) 24s military (-55c to +125c) military (-55c to +125c) mil-std-883 m5004 24d6 ft28c16(e)-25dmb 24d6 250 45 0.1 ft28c16(e)-25di ft28c16(e)-25ji ft28c16(e)-25pi ft28c16(e)-25si ft28c16(e)-25dm 250 30 0.1 ft28c16(e)-25dc ft28c16(e)-25jc ft28c16(e)-25pc ft28c16(e)-25sc ft28c16(e)-20dc ft28c16(e)-20jc ft28c16(e)-20pc ft28c16(e)-20sc ft28c16(e)-20dmb 45 ft28c16(e)-15dm ft28c16(e)-15dmb ft28c16(e)-15ji ft28c16(e)-15pi ft28c16(e)-15si ft28c16(e)-15di 30 0.1 0.1 30 200 45 0.1 200 0.1 ft28c16(e)-20dm 24d6 ft28c16(e)-15pc ft28c16(e)-15sc ft28c16(e)-20di ft28c16(e)-20ji ft28c16(e)-20pi ft28c16(e)-20si 24d6 24d6 24d6 operation range t acc (ns) ft28c16(e)-15dc ft28c16(e)-15jc 150 icc (ma) ordering code package 150 24d6 24-lead, 0.600" wide, non-windowed, ceramic dual inline package (cerdip) rev 2 9/12 2011 a ll data sheet.com
packaging information .045(1.14) x 45 pin no. 1 identify .025(.635) x 30 - 45 .012(.305) .008(.203) .021(.533) .013(.330) .530(13.5) .490(12.4) .030(.762) .015(3.81) .095(2.41) .060(1.52) .140(3.56) .120(3.05) .032(.813) .026(.660) .050(1.27) typ .553(14.0) .547(13.9) .595(15.1) .585(14.9) .300(7.62) ref .430(10.9) .390(9.90) at contact points .022(.559) x 45 max (3x) .453(11.5) .447(11.4) .495(12.6) .485(12.3) 1.27(32.3) 1.24(31.5) pin 1 .566(14.4) .530(13.5) .090(2.29) max .005(.127) min .065(1.65) .015(.381) .022(.559) .014(.356) 0 15 ref .630(16.0) .590(15.0) .065(1.65) .041(1.04) .690(17.5) .610(15.5) .012(.305) .008(.203) .110(2.79) .090(2.29) .161(4.09) .125(3.18) seating plane .220(5.59) max 1.100(27.94) ref .020(.508) .013(.330) .299(7.60) .291(7.39) .420(10.7) .393(9.98) .105(2.67) .092(2.34) .050(1.27) bsc .616(15.6) .598(15.2) .012(.305) .003(.076) .013(.330) .009(.229) .050(1.27) .015(.381) 8 0 ref pin 1 id 32j , 32-lead, plastic j-leaded chip carrier (plcc) dimensions in inches and (millimeters) jedec standard ms-018 aa 24p6 , 24-lead, 0.600 wide, plastic dual inline package (pdip) dimensions in inches and (millimeters) jedec standard ms-011 aa 24s , 24-lead, 0.300 wide, plastic gull wing small outline (soic) dimensions in inches and (millimeters) ft28c16 parallel eeprom 16k (2kx8) 1.29(32.8) 1.24(31.5) pin 1 .610(15.5) .510(13.0) .098(2.49) max .005(.127) min .060(1.52) .015(.381) .023(.584) .014(.356) .065(1.65) .045(1.14) .620(15.7) .590(15.0) 0 15 ref .700(17.8) max .015(.381) .008(.203) .110(2.79) .090(2.29) .200(5.08) .125(3.18) seating plane .225(5.72) max 1.100(27.94) ref 24d6, 24-lead, 0.600" wide, non-windowed, ceramic dual inline package (cerdip) rev 2 10/12 2011 a ll data sheet.com
ft28c16 parallel eeprom 16k (2kx8) 07/09/11 removed 200 s write time option rev 1 rev 2 original 12/04/05 revision history rev 2 11/12 2011 a ll data sheet.com
ashley crt, henley, marlborough, wilts, sn8 3rh uk tel: +44( 0 )1264 731200 fax:+44(0)1264 731444 e-mail sales@forcetechnologies.co.uk www.forcetechnologies.co.uk life support applications force technologies products are not designed for use in life support appliances, devices or systems where malfunction of a force technologies product can reasonably be expected to result in a personal injury. force technologies customers using or selling force technologies products for use in such applications do so at their own risk and agree to fully indemnify force technologies for any damages resulting from such improper use or sale. all trademarks acknowledged copyright force technologies ltd 2011 unless otherwise stated in this scd/data sheet, force technologies ltd reserve th e right to make changes, without notice, in the products, includ -ing circuits, cells and/or software, described or contained herein in order to improve design and/or performance. force technologies resumes no responsibility or liability for the use of any of these products, conveys no licence or any title under patent, copyright, or mask work to these products, and makes no representation or warranties that these products are free f rom patent, copyright or mask work infringement, unless otherwise specified. rev 2 12/12 2011 a ll data sheet.com

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